| 摘要 |
PURPOSE: A method for fabricating a gate electrode is provided to reduce gate depletion by increasing doping efficiency of a polycrystalline silicon layer, and to control penetration of boron impurities into a channel region by twice annealing the polycrystalline silicon layer. CONSTITUTION: An insulation layer is formed on a semiconductor substrate(100). The first polycrystalline silicon layer is formed on the insulation layer. The first annealing process is performed on the first polycrystalline silicon layer to minimize the size of a silicon lattice of the first polycrystalline silicon layer. The second polycrystalline silicon layer is formed on the first polycrystalline silicon layer. The second annealing process is performed on the second polycrystalline silicon layer to minimize the size of a silicon lattice of the second polycrystalline silicon layer. The third polycrystalline silicon layer is formed on the second polycrystalline silicon layer. The first, second and third polycrystalline silicon layers and the insulation layer are etched to form respective gate electrodes and gate oxide layers by a photolithography process.
|
