| 摘要 |
<p>A cryptographic method and related implements the Rijndael - AES encryption standard. In one improvement, the decryption round keys (w[i]) are generated on a round by round basis from the final Nk round keys saved from a previous encryption key scheduling operation. Latency and memory requirements are thereby minimized. S-boxes (410 to 413) for the AES key generation and cipher operation itself, may be implemented multiple times in different ways with different power signatures, with a pseudo-random selection (39o to 393, 410 to 413) of the pathway for the different bytes to be substituted. The premix operation (73) occurs simultaneously (72, 83) with the generation of first round keys, and a dummy circuit (Fig. 13) with substantially identical timing as the real premix circuitry adds power consumption noise to the premix.</p> |
