发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a technology for surely connecting a plug and wiring in a process for forming a connecting hole reaching an interlayer dielectric film formed on the upper layer of the wiring having Al as a principal component, and forming a plug in the connecting hole. SOLUTION: When the deposition temperature of an Al alloy film 19 which becomes a principal conductive layer of wiring 21 is taken as A, a temperature in a heat treatment process (degassing process) after forming a connecting hole 23 in an interlayer dielectric film 22 is taken as B, and the deposition temperature of a TiN film 25 which becomes a barrier conductive film 26 in the connecting hole 23 is taken as C, relations A≥B≥C, and A>C are simultaneously satisfied. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003338540(A) 申请公布日期 2003.11.28
申请号 JP20020144447 申请日期 2002.05.20
申请人 RENESAS TECHNOLOGY CORP 发明人 SAWARA MASASHI
分类号 H01L21/768;H01L21/3205;H01L21/8238;H01L23/52;H01L27/092;(IPC1-7):H01L21/768;H01L21/320;H01L21/823 主分类号 H01L21/768
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