发明名称 CIRCUIT ARRANGEMENT COMPRISING CASCADED FIELD EFFECT TRANSISTORS
摘要 The invention relates to a circuit arrangement based on the lengthening of the control trace by means of a voltage divider R1 and R2, which supplies a split control voltage in the ratio R1 /(R1 + R2) to the gate-electrode of the second working transistor AT2. Said lengthening however only relates to the steep part of the control trace. Accordingly, the invention is provided with first and second switching units in order to correctly apply the inception voltage and to dramatically shorten and correctly position the lengthened flat upper part of the control characteristic curve. In addition leakages from the inception voltages are collected or compensated, instead of being multiplied by the divider circuits.
申请公布号 WO02093734(A3) 申请公布日期 2003.11.27
申请号 WO2002EP03867 申请日期 2002.04.18
申请人 INFINEON TECHNOLOGIES AG;ZIMMERMANN, WALTER 发明人 ZIMMERMANN, WALTER
分类号 H03G1/00 主分类号 H03G1/00
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