| 摘要 |
A method and system of executing computer instructions is described. Each instruction defines first and second operands and an operation to be carried out on said operands. Each instruction also contains an address field of a predetermined bit length which identifies a test register holding a plurality of test bits greater than the predetermined bit length. The test register holds a test code defining a test condition. The test condition is checked against at least one condition code and the operation is selectively carried out in dependence on whether the condition code satisfies the test condition. In one embodiment, the condition codes are set on a lane-by-lane basis for packed operands.
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