发明名称 COARSE CALIBRATION CIRCUIT USING VARIABLE STEP SIZES TO REDUCE JITTER AND A DYNAMIC COURSE CALIBRATION (DCC) CIRCUIT FOR A 2 GHZ VCO
摘要 A calibration system for a Phase Locked Loop (PLL) includes a phase/frequency detector coupled to the output of a voltage controlled oscillator (VCO) and to a source of a reference frequency. A charge pump is connected to receive an error signal from the phase/frequency detector and provide a voltage to a low pass filter. The low pass filter provides a filtered error signal to the VCO and to a comparator system. The comparator system provides a comparator output indicating when the polarity of the error signal exceeds a positive limit or a negative limit. A calibration means continuously provides incremental calibration inputs to the VCO after a time delay. Thus the frequency of the VCO in the PLL is continuously corrected to compensate for frequency drift and avoid jitter caused by an excessive rate of response to calibration inputs.
申请公布号 US2003206042(A1) 申请公布日期 2003.11.06
申请号 US20020139931 申请日期 2002.05.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 WALKER NORMAN HUGO;MOY VICTOR;MULLGRAV ALLAN LESLIE;SORNA MICHAEL A.
分类号 H03L7/089;H03L7/099;H03L7/10;H03L7/183;(IPC1-7):H03L7/06 主分类号 H03L7/089
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