发明名称 Chip design with power rails under transistors
摘要 A method and an integrated circuit having power rails under transistors. In a preferred embodiment, power rails are formed over a substrate. Devices, such as FET transistors, are formed over the power rails. A preferred device is an inverter. The method comprises forming a first power rail (VSS) over the substrate. Then forming a second power rail (e.g., VDD) over the first power rail. The second power rail is insulated from the first power rail. Next, transistors are formed over the first and the second power rails.
申请公布号 US2003207523(A1) 申请公布日期 2003.11.06
申请号 US20030453007 申请日期 2003.06.03
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY 发明人 LIU LOUIS;CHOU HSIAO-HSUAN
分类号 H01L21/4763;H01L21/8238;H01L21/84;H01L27/118;H01L27/12;H01L29/80;(IPC1-7):H01L21/823 主分类号 H01L21/4763
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