发明名称 |
Transceiver with latency alignment circuitry |
摘要 |
A transceiver system is described. A secondary memory module is coupled to a primary channel for receiving data and signals from a controller. The secondary memory module comprises a memory and a secondary channel for transmitting the data and control signals to the memory. The secondary memory module further comprises a transceiver coupled to the primary channel and the secondary channel. The transceiver is designed to electrically isolate the secondary channel from the primary channel. The transceiver is a low latency repeater to permit the data and the control signals from the controller to reach the memory, such that a latency of a data request from the controller is independent of a distance of the transceiver from the controller.
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申请公布号 |
US6643752(B1) |
申请公布日期 |
2003.11.04 |
申请号 |
US19990458582 |
申请日期 |
1999.12.09 |
申请人 |
RAMBUS INC. |
发明人 |
DONNELLY KEVIN;JOHNSON MARK;TRAN CHANH;DILLON JOHN B. |
分类号 |
G06F13/40;(IPC1-7):G06F12/00 |
主分类号 |
G06F13/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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