Modifying material removal selectivity in semiconductor structure development

摘要

Container structures for use in integrated circuits and methods of their manufacture without the use of mechanical planarization such as chemical-mechanical planarization (CMP), thus eliminating CMP-induced defects and variations. The methods utilize localized masking of holes for protection of the inside of the holes during non-mechanical removal of exposed surface layers. The localized masking is accomplished through differential exposure of a resist layer to electromagnetic or thermal energy. The methods further include modifying the removal selectivity of the surface material relative to material protected by the localized masking. Modification of the removal selectivity eases or quickens removal of the surface material. The container structures are adapted for use in memory cells and apparatus incorporating such memory cells, as well as other integrated circuits.