发明名称 Memory system
摘要 A clock is located at a position close to a plurality of memory modules connected to a memory controller and located away from the controller, and wiring is carried out so that read access is preferential for transmission of read data. With respect to write data, a delay amount corresponding to a round-trip propagation delay time to each of the modules is measured and writing of the write data is carried out while maintaining a known time relationship between the clock and data. To measure round-trip reflection, lines are wired between the modules and a location detection circuit in a 1:1 relationship, and the circuit measures a time taken from a signal output time of a driver having the same impedance as that of the wired lines to a reflected-wave reception time of a hysteresis receiver.
申请公布号 US2003200407(A1) 申请公布日期 2003.10.23
申请号 US20020294594 申请日期 2002.11.15
申请人 OSAKA HIDEKI;KOMATSU TOYOHIKO;HORIGUCHI MASASHI;HATANO SUSUMU;ITO KAZUYA 发明人 OSAKA HIDEKI;KOMATSU TOYOHIKO;HORIGUCHI MASASHI;HATANO SUSUMU;ITO KAZUYA
分类号 G06F13/16;G06F12/00;G06F13/40;(IPC1-7):G06F12/00 主分类号 G06F13/16
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