发明名称 Capacitor constructions, methods of forming bitlines, and methods of forming capacitor and bitline structures
摘要 The invention encompasses a method of forming bitlines. A substrate is provided, and comprises a plurality of spaced electrical nodes. A bitline layer is formed over at least some of the spaced electrical nodes. The bitline layer comprises at least one conductive material. Openings are etched through the bitline layer and to the electrical nodes. After the openings are formed, the bitline layer is patterned into bitlines. The invention also encompasses a method of forming a capacitor and bitline structure. A substrate is provided, and comprises a plurality of spaced electrical nodes. A stack of bitline materials is formed over at least some of the spaced electrical nodes. The bitline materials comprise at least one insulative material over at least one conductive material. Openings are etched through the bit line materials and to the electrical nodes. Conductive masses are formed in at least some of the openings. After the conductive masses are formed, the bitline materials are patterned into bitlines. Capacitor constructions are formed over the patterned bit lines and electrically connected to the electrical nodes through the conductive masses. Additionally, the invention encompasses capacitor constructions.
申请公布号 US6636415(B2) 申请公布日期 2003.10.21
申请号 US20020198401 申请日期 2002.07.17
申请人 MICRON TECHNOLOGY, INC. 发明人 TANG SANH D.;NARASIMHAN RAJ
分类号 H01L21/60;H01L21/8242;(IPC1-7):H01K4/005;H01L21/824 主分类号 H01L21/60
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