发明名称 |
Method of planarizing a conductive plug situated under a ferroelectric capacitor |
摘要 |
An embodiment of the instant invention is a method of fabricating a planar conductive via in an opening through a dielectric layer having a top surface, a bottom surface and the opening having sides, the method comprising the steps of: depositing a first conductive material (114 of FIG. 7d) on the top surface of the dielectric layer and in the opening in the dielectric layer to substantially fill the opening with the conductive material; removing the portion of the first conductive material located on the dielectric layer and removing a portion of the first conductive material located in the opening in the dielectric layer to recess (406 of FIG. 7d) the first conductive material below the top surface of the dielectric layer; depositing a second conductive material (704 of FIG. 7d) in the recess to form a substantially planar top surface substantially coplanar with the top surface of the dielectric layer; and forming a third conductive material (302 of FIG. 7d) on the second conductive material, at least one of the second conductive material and the third conductive material acting as a diffusion barrier to prevent oxidation of the first conductive material.
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申请公布号 |
US6635528(B2) |
申请公布日期 |
2003.10.21 |
申请号 |
US20000741675 |
申请日期 |
2000.12.19 |
申请人 |
TEXAS INSTRUMENTS INCORPORATED;AGILENT TECHNOLOGIES INC |
发明人 |
GILBERT STEPHEN R.;SUMMERFELT SCOTT;COLOMBO LUIGI |
分类号 |
H01L21/768;H01L21/02;H01L21/3213;H01L21/8246;H01L27/105;H01L27/115;(IPC1-7):H01L21/00;H01L21/824 |
主分类号 |
H01L21/768 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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