发明名称 AM DEMODULATING CIRCUIT
摘要 PROBLEM TO BE SOLVED: To prevent the reversal of output without stopping APC operations at the time of overmodulation. SOLUTION: An AM demodulating circuit using PLL (Phase Locked Loop) is provided with a voltage comparator 10 which compares a no signal potential of a signal potential of detection output when AM signals are not modulated and an output of AM detection signals; a switch 12 whose output terminal is connected to an APC filter 3, one of whose input terminals is connected to a first APC detection circuit 2, and the other of whose input terminals is connected to a second APC detection circuit 8; and a switch control circuit 9 which selects one of the input terminals of the switch 12 at the time of normal modulation, and selects the other input terminal of the switch 12 at the time of overmodulation by a logical product of the output of the voltage comparator 10 and the LOCK detection signals of the PLL loop. COPYRIGHT: (C)2004,JPO
申请公布号 JP2003298353(A) 申请公布日期 2003.10.17
申请号 JP20020104164 申请日期 2002.04.05
申请人 MITSUBISHI ELECTRIC CORP 发明人 NISHIKIDO OSAMU
分类号 H03D1/22;(IPC1-7):H03D1/22 主分类号 H03D1/22
代理机构 代理人
主权项
地址