| 摘要 |
A process for fabricating a two-bit ROM cell, comprises forming a control electrode (1052n,1053n) over a semiconductor layer (103) of a first conductivity type, a region of the semiconductor layer underlying the control electrode constituting a memory cell channel region; and providing, on either side of the channel region, differentiated-resistance doped regions (1151-1154;2011-2014,2031-2034) having respective resistance values that depends on a logic state of a respective one of the two bits to be stored in the cell, the resistance values of the differentiated-resistance doped regions being set by means of a selective introduction of dopants. The differentiated-resistance doped regions are formed by selectively providing sidewall spacers (109) at sidewalls of the control electrode, and using the sidewall spacers as a mask against the introduction of dopants. <IMAGE> |
