发明名称 CPU expandability bus
摘要 Embodiments of the present invention provide a computer system with a high speed, high bandwidth expandability bus for integrated and non-integrated CPU products. The computer system includes a processor, a chipset coupled to the processor, a graphics processor coupled to the chipset for controlling a video display and a main memory coupled to the chipset. The computer system further includes an expandability bus, which is coupled at one end to the chipset and at the other end to a replaceable electronic component. The expandability bus can be changeably configured to enable or disable bus mastering at both ends, as required, to operate with whichever replaceable electronic component is installed.
申请公布号 US2003188075(A1) 申请公布日期 2003.10.02
申请号 US20030401586 申请日期 2003.03.31
申请人 PELEG ALEX D.;GOLBERT ADI 发明人 PELEG ALEX D.;GOLBERT ADI
分类号 G06F13/40;(IPC1-7):G06F13/36 主分类号 G06F13/40
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