发明名称 A METHOD FOR THE HYBRID INTEGRATION OF DISCRETE ELEMENTS ON A SEMICONDUCTOR SUBSTRATE
摘要 A method and apparatus is provided for locating with improved vertical positioning accuracy a discrete element on a semiconductor optoelectronic integrated circuit. The method employs an etch stop layer located beneath a series of semiconductor layers. The semiconductor layers may include waveguides to couple light between integrated or discrete elements. Pits with accurate depth are etched in the semiconductor layers down to the etch stop layer. Accurate alignment between a discrete element and another element is made possible by controlling their respective distances from the etch stop layer.
申请公布号 CA2209548(C) 申请公布日期 2003.09.30
申请号 CA19972209548 申请日期 1997.07.04
申请人 NORTHERN TELECOM LIMITED 发明人 KOVACIC, STEPHEN J.
分类号 G02B6/12;G02B6/42;H01L27/15;H01L31/0232;H01S5/00;(IPC1-7):H01L31/02;H01L31/023;H01L31/18 主分类号 G02B6/12
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