Data retaining circuit e.g. latch circuit for edge triggered flip flops, has pull-up/pull-down paths that takes in and retains input data as pull-up/pull-down control signal in synchronization with clock

摘要

The circuit has a section (11) that retains data to be outputted. A pull-up path (12)/pull-down path (13) takes in and retains input data as a pull-up/pull-down control signal in synchronization with a clock. The path (12) pulls up the data retained in the section when the pull-up control signal is one of values and the path (13) pulls down the data when the pull-down control signal is the other value. The pull-up and pull-down paths have a gate circuit composed of transistors of different polarities and the pull-up and pull-down control signals are directly applied to the gates.