| 摘要 |
A circuit and method for generating a variable frequency clock signal that uses a first, lower frequency oscillator (102), to modulate and vary the frequency of a second, higher frequency oscillator (106) to generate a variable frequency clock signal. The circuit includes a first oscillator (102), a control circuit (104), and a second oscillator (106). The first oscillator (102) generates a first signal having a substantially fixed-frequency magnitude. The control circuit (104) is coupled to receive the first signal from the first oscillator (102) and outputs control signals based on the received first signal. The second oscillator (106) is coupled to receive the control signals from the control circuit (104) and generates the variable frequency magnitude clock signal in response to the received control signal. |
