发明名称 Cache line replacement policy enhancement to avoid memory page thrashing
摘要 A method for a cache line replacement policy enhancement to avoid memory page thrashing. The method of one embodiment comprises comparing a memory request address with cache tags to determine if any cache entry in set 'n' can match the address. The address is masked to determine if a thrash condition exists. Allocation to set 'n' is discouraged if a thrash condition is present.
申请公布号 US6625695(B2) 申请公布日期 2003.09.23
申请号 US20020319738 申请日期 2002.12.13
申请人 INTEL CORPORATION 发明人 FANNING BLAISE B.
分类号 G06F12/12;(IPC1-7):G06F12/00 主分类号 G06F12/12
代理机构 代理人
主权项
地址