BUFFER FOR OUTPUTTING HIGH-SPEED DATA

摘要

PURPOSE: A buffer for outputting high-speed data is provided to improve a data output speed by adding a pull-up transistor and a pull-down transistor to a data output buffer of a memory device. CONSTITUTION: A buffer for outputting high-speed data includes a first PMOS transistor(MPA1), a first NMOS transistor(MNA1), a second NMOS transistor(MNA2), and a second PMOS transistor(MPA2). The first PMOS transistor(MPA1) is used for receiving data signal and transmitting a supply voltage to the outside of a chip. The first NMOS transistor(MNA1) is used for receiving the inverted data signals and transmitting the supply voltage to an output terminal. The second NMOS transistor(MNA2) is used for receiving the data signal and transmitting a ground voltage to the output terminal. The second PMOS transistor(MPA2) is used for receiving the inverted data signal and transmitting the ground voltage to the output terminal.