发明名称 METHOD TO REDUCE POWER IN A COMPUTER SYSTEM WITH BUS MASTER DEVICES
摘要 A system memory accessed by a bus master controller is set as non-cacheable. A bus master status bit is not set for any bus master controller transfer cycles with the non-cacheable memory while the a system processor is in a low power state.
申请公布号 AU2003217741(A1) 申请公布日期 2003.09.09
申请号 AU20030217741 申请日期 2003.02.25
申请人 INTEL CORPORATION 发明人 JAMES KARDACH
分类号 G06F1/32;G06F12/08;(IPC1-7):G06F1/32 主分类号 G06F1/32
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