| 摘要 |
A CDR circuit arrangement, for example for a transceiver module, features a data recovery unit (4) for the recovery of the data contained in a received signal (DATA) by scanning this received data signal, and a phase evaluation unit for the determination of a suitable phase position for the scanning carried out by the data recovery unit (4). The phase evaluation unit comprises a scanning device (1) for the oversampling of a the received data signal (DATA) in accordance with several different scanning phases (P0-P6), a phase detector device (2) for the evaluation of the scanning values (A0-A6) accordingly prepared by the scanning device (1), in order thereby to derive intermediate signals (UP1-UP3, DN1-DN3), which classify the phase error during the scanning of the data signal by the scanning device (1) in respect of its size and direction of deviation, as well as a filter device (3), in order to subject the intermediate signals (UP1-UP3, DN1-DN3) generated by the phase detector device (2) to a weighted filtering process. In this situation, a setting signal (DELTAP) is generated by the filter device (3) for the subsequent regulation and control of the scanning phases (P0-P6) of the scanning device (1).
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