| 摘要 |
A short/narrow high performance MOSFET structure in accordance is formed in a semiconductor substrate having a first conductivity type. A first linear sequence of diffusion regions having a second conductivity type is formed in the semiconductor substrate. Each diffuision region in the first sequence is spaced-apart from the prior diffusion region in the first sequence to define a substrate channel region between adjacent diffusion regions. A second linear sequence of diffusion regions having the second conductivity type is also formed in the substrate. As in the case of the first linear sequence, each diffusion region in the second sequence is spaced-apart from the prior diffusion region in the sequence to define s substrate channel region between adjacent diffusion regions in the sequence. Dielectric material is formed in the substrate between the first and second diffusion region sequences to provide electrical isolation between the two sequences. Each substrate channel region in the first sequence corresponds to a substrate channel region in the second sequence to define channel region pairs. A conductive gate electrode is provided that includes gate electrode fingers connected to a common gate electrode portion. Each of the gate electrode fingers extends over an associated channel region pair and is separated therefrom by intervening dielectric material. The diffusion regions in the first and second linear sequences are alternately connected to the source and drain electrodes of the device, resulting in short/narrow gate cells that are connected both in parallel and in series, thereby increasing the device current derive.
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