| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a processor shortening the total execution time, namely, simultaneously reducing the different number of clocks, and capable of processing the same number of clocks with those of an existing processor. <P>SOLUTION: This clock number variable processor has a plurality of pipeline stages, executes a command in a pipeline system synchronously with the clock, and executes and processes using a plurality of clocks according to the command. This processor is provided with reduction command detecting means 22 capable of setting the reduction number of the clocks by a signal relative to the command of the same or different number of the clocks, and clock control means 25 producing the clocks according to the clock reduction number different for every command according to the detecting output provided from the reduction command detecting means 22. <P>COPYRIGHT: (C)2003,JPO</p> |
