发明名称
摘要 An apparatus, for operating a multiplexed 128-bit external bus within a computer system, includes arbitration logic that arbitrates between contending address and data requests according to the number of outstanding data and/or snoop transactions on the external bus. In response to the outcome of this arbitration, selection logic grants the external bus to either the contending address or data request. The arbitration logic may compare the number of outstanding data transactions to a predetermined data threshold number when performing the arbitration, this data threshold number being dynamically alterable by an application program or operating system so as to optimize external bus throughput under predetermined conditions.
申请公布号 KR100393168(B1) 申请公布日期 2003.07.31
申请号 KR20017002477 申请日期 2001.02.26
申请人 发明人
分类号 G06F13/00;G06F13/42 主分类号 G06F13/00
代理机构 代理人
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