发明名称 |
Interleaving apparatus and method for a communication system |
摘要 |
An interleaving apparatus and method for a communication system which can be applied to determine a new interleaver size N'=2<m>x(j+1) and addresses of 0 to N'-1, if a given interleaver size N is larger than 2<m>xj and smaller than 2<m>x(j+1), where m represents a first parameter indicating a number of consecutive zero bits from a least significant bit (LSB) to a most significant bit (MSB), and j represents a second parameter corresponding to a decimal value other than said consecutive zero bits. The interleaving apparatus and method sequentially stores N input data bits in an interleaver memory with the new interleaver size N' from an address 0 to an address N-1. The interleaving apparatus and method then executes a Partial Bit Reversal(PBRO)-interleaving the memory with the new interleaver size N', and reads data from the memory by deleting addresses corresponding to addresses of N to N'-1 of the memory before interleaving. <IMAGE>
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申请公布号 |
EP1330040(A2) |
申请公布日期 |
2003.07.23 |
申请号 |
EP20030000524 |
申请日期 |
2003.01.09 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM, MIN-GOO,.;HA, SNAG-HYUCK |
分类号 |
H03M13/27;H04L1/00;(IPC1-7):H03M13/27 |
主分类号 |
H03M13/27 |
代理机构 |
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