发明名称 Method and apparatus for executing a program using primary, secondary and tertiary memories
摘要 A method and apparatus for executing an integrated circuit (IC) test program including at least one calling instruction partitions at least one called subroutine into first and second subroutine portions, loads IC test program instructions into a primary memory, loads the first subroutine portion into the primary memory contiguous with the calling instruction, inserts a memory transfer access instruction after the first portion, and loads a remainder of the IC test program instructions into primary memory. The method then executes instructions from primary memory. Execution of the calling instruction in the primary memory causes the second subroutine portion to be loaded into a FIFO element from a secondary memory. The first subroutine portion executes from the primary memory. Execution of the memory transfer access instruction initiates fetching and executing the second portion of the called subroutine from a first-in-first-out (FIFO) element.
申请公布号 US6598112(B1) 申请公布日期 2003.07.22
申请号 US20000659259 申请日期 2000.09.11
申请人 AGILENT TECHNOLOGIES, INC. 发明人 JORDAN STEPHEN D;KRECH, JR. ALAN S
分类号 G06F9/445;G11C29/16;(IPC1-7):G06F12/00;G06F9/45;G11C29/00 主分类号 G06F9/445
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