| 摘要 |
A center phase decision circuit for deciding a center phase of a data signal, in which, in case the data signal is subjected to disturbance in the signal waveform, the signal is corrected for the disturbance to re-establish normal communication.A circuit for deciding the center phase of a data signal input as n-phase serial data, where n is an integer not less than 2, includes a serial to parallel converter circuit for serial to parallel conversion of the data signal and for outputting, using each of a plural number of output ports, parallel data converted by the serial to parallel conversion from the serial data with a period equal to n times the period of the data signal, a plural number of phase comparator circuits for comparing the phases of the parallel data output from the respective output ports to detect the phase non-coincidences, a plural number of counters for counting the number of times of detection of phase non-coincidences in the respective output ports and a circuit for deciding the center phase based on the number of times of the phase non-coincidences as counted.
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