发明名称 ELECTROSTATIC PROTECTION CIRCUIT FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an electrostatic protection circuit for a semiconductor integrated circuit which can have both high discharging capacity and a low trigger voltage. SOLUTION: When an electrostatic surge with a positive polarity based upon a ground terminal GND is applied to an input/output pad I/O, a breakdown current Itrig of an n channel MOS transistor NMOS flows from the input/output pad I/O through a p<SP>+</SP>diffusion layer PD1 and a forward diode of an n-well NW1. Consequently, a thyristor comprising a p<SP>+</SP>diffusion PD1 as the anode of the diode, the n-well NW1, a p well PW1, and an n<SP>+</SP>diffusion layer ND2 as the source of a transistor NMOS operates, to discharge the electrostatic surge to the ground terminal GND. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003203985(A) 申请公布日期 2003.07.18
申请号 JP20020063771 申请日期 2002.03.08
申请人 NEC ELECTRONICS CORP 发明人 MORISHITA YASUYUKI
分类号 H01L27/04;H01L21/822;H01L21/8222;H01L21/8248;H01L21/8249;H01L23/62;H01L27/02;H01L27/06;(IPC1-7):H01L21/822;H01L21/824 主分类号 H01L27/04
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