| 摘要 |
<p>A computer system for accelerated processing of stack oriented interpretive language instructions comprising a translator which establishes correlations between address values and core operations, a processing accelerator core for performing core operations, a cache memory for storing operand data, a control logic device for reading and writing operand data and for determining core operations corresponding with address values and an arithmetic logic unit for receiving data and performing core operations, being specified solely by address values.</p> |
