发明名称 |
SEMICONDUCTOR MEMORY APPARATUS HAVING BLOCK-BASE REFRESH FUNCTION |
摘要 |
PURPOSE: A semiconductor memory apparatus having a block-base refresh function is provided to reduce the power consumption upon performing a refresh operation by combining a control signal and a decoded row address signal to assign a memory block. CONSTITUTION: A semiconductor memory array(360) has a region that is divided into blocks. A refresh operation generator(310) receives control signals to generate a refresh signal and an entry signal. A mode resistor(370) receives the control signals and an external address to generate a starting signal. A refresh counter(330) counts a row address to be refreshed upon performing a refresh operation. A low address buffer(320) buffers the external address to output it or buffers the low address generated in the refresh counter(330) to output it. A low decoder(340) decodes the low address generated from the low address buffer(320). A block selector(350) combines the output signal of the low decoder(340), the refresh signal, the entry signal, and the starting signal to assign a memory block.
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申请公布号 |
KR20030054886(A) |
申请公布日期 |
2003.07.02 |
申请号 |
KR20010085318 |
申请日期 |
2001.12.26 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
JU, JAE HUN;KANG, SANG SEOK;KWAK, BYEONG HEON |
分类号 |
G11C11/401;(IPC1-7):G11C11/401 |
主分类号 |
G11C11/401 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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