发明名称
摘要 PURPOSE: To provide the method and device which enables division and remainder calculation by a redundant binary operation method even unless the most significant digit bit of a divisor is '1'. CONSTITUTION: When the divisor is inputted, a 1st octet head '1' detection part 7 detects the head position of a bit '1' in the divisor and a bit shift quantity determination part 8 and a bit shift part 10 for input shift the divisor to the high order and store it in a divisor register 16 so that the most significant digit bit is '1'; when its remainder is outputted, the bit shift quantity determination part 8 and a bit shift circuit 15 for output shift the remainder stored in a remainder register 19 to the low order by the same number of bits as the divisor input and outputs it.
申请公布号 JP3422001(B2) 申请公布日期 2003.06.30
申请号 JP19940228098 申请日期 1994.09.22
申请人 发明人
分类号 G06F7/537;G06F7/49;G06F7/52;G06F7/535;G06F7/72 主分类号 G06F7/537
代理机构 代理人
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