发明名称 METHOD FOR MANUFACTURING DEEP SUB-MICRON CMOS SOURCE/ DRAIN BY USING MDD AND SELECTIVE CVD SILICIDE
摘要 PROBLEM TO BE SOLVED: To provide a method for manufacturing a MOS device and a CMOS device having small number of times of photoelectric alignments and small number of ion implanting steps. SOLUTION: The method for forming the MOS device on a silicon substrate comprises (a) the step of preparing the substrate so as to include a first conductivity type conductive region having a first device active region, (b) the step of forming a gate electrode structure on the first device active region and including a gate electrode and an insulator side wall in the gate electrode structure, (c) the step of implanting a reverse conductivity type ion to the conductivity type of the first device active region in the peeling part of the conductive region and forming a source region and a drain region on the region opposed to the gate electrode structure, and (d) the step of depositing the silicide layer on the source region and the drain region and the gate electrode by a selective CVD. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003179071(A) 申请公布日期 2003.06.27
申请号 JP20020270817 申请日期 2002.09.17
申请人 SHARP CORP 发明人 IGUCHI KATSUJI;SHIEN TEN SUU;YOSHI ONO;MAA JER-SHEN
分类号 H01L21/28;H01L21/205;H01L21/265;H01L21/285;H01L21/336;H01L21/8238;H01L27/092;H01L29/78;(IPC1-7):H01L21/336;H01L21/823 主分类号 H01L21/28
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