发明名称 |
Implanted asymmetric doped polysilicon gate FinFET |
摘要 |
An asymmetric field effect transistor (FET) that has a threshold voltage that is compatible with current CMOS circuit designs and a low-resistance gate electrode is provided. Specifically, the asymmetric FET includes a p-type gate portion and an n-type gate portion on a vertical semiconductor body; an interconnect between the p-type gate portion and the n-type gate portion; and a planarizing structure above the interconnect. |
申请公布号 |
US2003113970(A1) |
申请公布日期 |
2003.06.19 |
申请号 |
US20010683328 |
申请日期 |
2001.12.14 |
申请人 |
FRIED DAVID M.;NOWAK EDWARD J.;RANKIN JED H. |
发明人 |
FRIED DAVID M.;NOWAK EDWARD J.;RANKIN JED H. |
分类号 |
H01L21/28;H01L21/265;H01L21/336;H01L29/423;H01L29/49;H01L29/786;(IPC1-7):H01L21/336 |
主分类号 |
H01L21/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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