Engineering-change method of semiconductor circuit

摘要

An engineering-change method of a semiconductor circuit includes a P&R (placement and routing) step of conducting placement and routing and logical optimization using a first netlist to generate a second netlist and a first layout; an ECO (engineering-change order) step of making logical changes in design of the first netlist to generate a third netlist; an ECO-formal verification step of generating a fourth netlist by changing the second netlist such that the fourth netlist becomes logically equivalent to the third netlist; and another ECO step of generating a second layout by changing the first layout such that it matches the fourth netlist. This method can implement an engineering-change method of a semiconductor circuit capable of reducing the design period with eliminating design feedback to the logical optimization at the P&R step.