发明名称 |
Semiconductor device and manufacturing method thereof |
摘要 |
A resist pattern is formed-on a silicon oxide film. This resist pattern is formed in such a shape to expose only portions necessary for electrical insulation between bit lines adjacent to each other. In other words, here, these portions are a connection hole forming region in which a contact hole of the bit line is formed and a connection hole forming region in which a contact hole of a word line is formed. Using this resist pattern as a mask, an insulation region is formed by full anisotropic etching of the silicon oxide film. Siliciding is performed in this state and silicide is formed on a surface of the bit line exposed to the connection hole forming region and a surface of a source/drain in an active region of a peripheral circuit. <IMAGE>
|
申请公布号 |
EP1318543(A2) |
申请公布日期 |
2003.06.11 |
申请号 |
EP20020252534 |
申请日期 |
2002.04.09 |
申请人 |
FUJITSU LIMITED |
发明人 |
TAKAHASHI, KOJI;YOSHIMURA, TETSUO |
分类号 |
H01L21/8246;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824;H01L21/824 |
主分类号 |
H01L21/8246 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|