| 摘要 |
Memory cells, each with a storage capacitor and selection transistor, word lines for selecting memory cells, bit lines for reading/writing data signals to/from cells connected to a first capacitor electrode via the transistor, with the second capacitor electrode of each cell connected to a plate voltage connection, and a control circuit for driving the lines in an initialization mode so the first electrode adopts a defined value. The device has memory cells (MC1), each with a storage capacitor (SC1) and selection transistor (AT1), word lines (WL1) for selecting memory cells, bit lines (BL1) for reading or writing data signals to/from cells connected to a first capacitor electrode (SE1) via the transistor, whereby the second capacitor electrode (GE1) of each cell is connected to a plate voltage (VPL) connection, and a control circuit (S,I,P1,N1) for driving the lines in an initialization mode so that first electrode adopts a defined value. AN Independent claim is also included for the following: a method of operating an inventive device.
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