摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor memory device which is compatible with various packages. SOLUTION: Pad columns are arranged near the chip along EAST zone and WEST zone (E/W zones). In this peripheral pad arrangement, a VDD pad 11 and a VSS pad 12 are arranged at the ends of the NORTH zone and the SOUTH zone (N/S zones) in the central section, in order to make them adaptable to TSOP even for a peripheral pad arrangement. Furthermore, taking into consideration of frame design in the case of TSOP, some pads at the ends of pad columns are arranged in an order which is reverse to the order of the pin arrangement. Moreover, for a package which does not require consideration of frame design, a VDDQ pad 19 and a VSSQ pad 20 are arranged in the same order as the pin arrangement. Taking into consideration of the use for a BGA package, one couple of a VDD pad 17 and a VSS pad 18 is arranged at each extreme end of the pad columns.</p> |