发明名称 WATCHDOG ARRANGEMENT.
摘要 <p>A watchdog arrangement advantageously provides systems, such as television signal processing apparatus, with a reliable, cost effective means by which to maintain consistent, stable operation. According to at least one embodiment, a hardware watchdog circuit receives regular pulses from a software timer in an integrated circuit (IC) to refresh itself. In the event that the watchdog circuit is not refreshed, it provides a predetermined logic signal to a non-maskable interrupt (NMI) terminal of the IC to generate a reset similar to what is generated by an internal IC watchdog.</p>
申请公布号 MXPA02011874(A) 申请公布日期 2003.04.10
申请号 MX2002PA11874 申请日期 2001.05.24
申请人 THOMSON LICENSING S.A. 发明人 FORLER, JOSEPH, WAYNE
分类号 G06F11/30;G06F11/00;H04N5/14;H04N17/04;(IPC1-7):G06F11/00 主分类号 G06F11/30
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