发明名称 Sense amplifiers having reduced Vth deviation
摘要 Providing a semiconductor device which lessen influence of the transistor threshold voltage deviation that is one of noise elements when the sense amplifiers are amplified, and which are capable of accurately sensing and amplifying micro signals having read from the memory cells in the sense amplifiers. In a DRAM chip, P+-type gate PMOSs of P+-type polysilicon gates each having a low impurity density of channel and N+-type gate NMOSs of N+-type polysilicon gates are used in a sense amplifier cross coupling section to further increase substrate voltages of the PMOSs and to decrease substrate voltages of the NMOS. For this reason, a deviation of threshold voltage caused by channel implantation is reduced, and a small signal generated on a data line at a read operation of a low-potential memory array is accurately sensed and amplified by a sense amplifier. In addition, the threshold voltages are increased by a substrate bias effect, and a leakage current in a sense amplifier data holding state is reduced.
申请公布号 US6538945(B2) 申请公布日期 2003.03.25
申请号 US20020050561 申请日期 2002.01.18
申请人 HITACHI, LTD.;NEC CORPORATION 发明人 TAKEMURA RIICHIRO;TAKAHASHI TSUGIO;NAKAMURA MASAYUKI;NAGAI RYO;TAKAURA NORIKATSU;SEKIGUCHI TOMONORI;KIMURA SHINICHIRO
分类号 G11C11/409;G11C7/06;G11C11/4091;H01L21/8238;H01L21/8242;H01L27/092;H01L27/108;(IPC1-7):G11C7/00 主分类号 G11C11/409
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