| 摘要 |
<p>An architecture for implementing host-based security such that data security may be applied whenever the confidential data leaves a host computer or a networked device. The improved method and architecture may be implemented in a single integrated circuit (302) for speed, power consumption, and space-utilization reasons. Within the integrated circuit (302), a combination of hardware-implemented (304), network processor-implemented (306), and software-implemented functions may be provided. The innovative host-based security architecture may offer line-rate IPSec acceleration, TCP acceleration, or both.</p> |
