发明名称 AN ARRANGEMENT FOR ESD PROTECTION OF AN INTEGRATED CIRCUIT
摘要 <p>To protect a high-frequency integrated circuit (1) against higher voltages than normal operating voltages on an input/output terminal connected to a bonding pad (2), a semiconductor varistor (3) having low and essentially constant resistance for said normal operating voltages and higher resistance for said higher voltages is integrated between the bonding pad (2) and the input/output terminal together with the integrated circuit (1).</p>
申请公布号 WO2003021737(A1) 申请公布日期 2003.03.13
申请号 SE2002001535 申请日期 2002.08.28
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址