发明名称 |
Method of fabricating semiconductor device |
摘要 |
After P+ ions are implanted into a polysilicon film in an nMOSFET region, a heat treatment is performed to diffuse phosphorus down to the lower part of the polysilicon film. The diffusion reduces the concentration of phosphorus in an upper end portion of the polysilicon film and inhibits the upper end edges of a gate electrode from being increased in size during patterning. Then, B+ ions are implanted into the polysilicon film in a pMOSFET region and the polysilicon film is etched into a gate configuration. Since a heat treatment for simultaneously diffusing phosphorus and boron in the polysilicon film is not performed, the entrance of boron from the gate electrode into a semiconductor substrate is inhibited, while the occurrence of side etching during the formation of an n-type polysilicon gate is suppressed.
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申请公布号 |
US6524904(B1) |
申请公布日期 |
2003.02.25 |
申请号 |
US20000551542 |
申请日期 |
2000.04.18 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
SEGAWA MIZUKI;ARAI MASATOSHI;YABU TOSHIKI;KUGO SHUNSUKE |
分类号 |
H01L21/8238;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/8238 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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