发明名称 DATA INPUT/OUTPUT DEVICE, MEMORY SYSTEM, DATA INPUT/ OUTPUT CIRCUIT AND DATA INPUT/OUTPUT METHOD
摘要 PROBLEM TO BE SOLVED: To reduce wasteful cycles in switching of buses. SOLUTION: When output of data is switched from a memory 20 to a memory controller 10, the memory controller 10 fetches write data outputted from the memory 20 and outputs the fetched write data to a data bus 30. Next, the memory controller 10 outputs its own write data to the data bus 30, after outputting the fetched read data to the data bus 30.
申请公布号 JP2003050776(A) 申请公布日期 2003.02.21
申请号 JP20010223686 申请日期 2001.07.24
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 MORI MASAYA;WATANABE SHINPEI
分类号 G11C11/417;G06F3/00;G06F13/00;G06F13/16;G06F13/38;G06F13/42;G11C7/10;(IPC1-7):G06F13/38 主分类号 G11C11/417
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