发明名称 DATA PROCESSOR
摘要 <p>PROBLEM TO BE SOLVED: To improve the security of stored information while keeping satisfactory rewriting operability for an electrically erasable and writable non-volatile memory on-chipped in a data processor. SOLUTION: The erasable/writable non-volatile memory has a first domain (12) and a second domain (11). A mode setting circuit (8) can set a first operating mode (PROM writer mode) for allowing erasing/writing in the first memory domain by connecting a PROM writer to the data processor. A domain (16) is located for storing security information for setting secrecy protection to the first domain. Even in a secrecy protecting state, a CPU (2) allows the writing after all erase to the first domain in the first operating mode. When allowing the rewriting in the first operating mode during the secrecy protecting state, the first domain is accompanied with all erase, so that secrecy protection can be improved.</p>
申请公布号 JP2003044457(A) 申请公布日期 2003.02.14
申请号 JP20010227202 申请日期 2001.07.27
申请人 HITACHI LTD;HITACHI ULSI SYSTEMS CO LTD 发明人 IIJIMA MASAHITO;TOMONAGA KAZUHIRO;MAEHARA HIROAKI
分类号 G06F12/14;G06F15/78;G06F21/24;G11C16/02;(IPC1-7):G06F15/78 主分类号 G06F12/14
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