发明名称 |
High sensitive data signal amplifying circuit |
摘要 |
A high sensitive data signal amplifying circuit is capable of amplifying data signals having a small differential voltage by amplifying the data signals transferred from bit line amplifying unit in two stages. The high sensitive data signal amplifying circuit includes: a bit line amplifying unit for amplifying data stored at a memory cell and loading the amplified data on one of a bit line and a bit bar line; a column address selecting unit for transferring an output signal of the bit line amplifying unit depending on a column address signal; a first data signal amplifying unit for amplifying a data signal transferred by the column address selecting unit; a second data signal amplifying unit for amplifying an output signal from the first data signal amplifying unit; and a data signal transferring unit for transferring an output signal of the second data signal amplifying unit to output to a buffering unit.
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申请公布号 |
US6519196(B1) |
申请公布日期 |
2003.02.11 |
申请号 |
US20000722476 |
申请日期 |
2000.11.28 |
申请人 |
HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. |
发明人 |
JANG JI-EUN;LEE JAE-JIN |
分类号 |
G11C7/06;G11C7/10;(IPC1-7):G11C7/00 |
主分类号 |
G11C7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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