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发明名称
METHOD FOR DEPOSITING A SELECTED THICKNESS OF AN INTERLEVEL DIELECTRIC MATERIAL TO ACHIEVE OPTIMUM GLOBAL PLANARITY ON A SEMICONDUCTOR WAFER
摘要
申请公布号
KR20030007720(A)
申请公布日期
2003.01.23
申请号
KR20027016095
申请日期
2002.11.27
申请人
发明人
分类号
C23C16/52;H01L21/316;H01L21/3105;H01L21/3205;H01L21/768
主分类号
C23C16/52
代理机构
代理人
主权项
地址
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