发明名称 |
Semiconductor device |
摘要 |
A high-potential side power device driving circuit has a clock signal generation circuit generating the so-called internal clock signal by outputting a pulse in a constant cycle for driving NMOS transistors and an iterative pulse generation circuit monitoring the state of an external input signal in synchronization with an output signal of the clock signal generation circuit, receiving a pulsing input signal generated with reference to a ground potential and generating pulsing ON and OFF signals. Thus provided is a level shifting circuit capable of preventing a power device from a malfunction also when a dv/dt transient signal is supplied with time difference.
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申请公布号 |
US2003016054(A1) |
申请公布日期 |
2003.01.23 |
申请号 |
US20020196228 |
申请日期 |
2002.07.17 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
OKAMOTO KAZUAKI;ARAKI TORU |
分类号 |
H02M1/08;H03K17/06;H03K17/08;H03K17/0812;H03K17/10;H03K17/56;H03K19/0175;(IPC1-7):H03K19/017 |
主分类号 |
H02M1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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