发明名称 Synchronisation eines Datenstromes
摘要 A synchronizing unit (40) synchronizes a data flow between a first (30) and a second device (50) and receives a first clock signal (DUT-CLK) from the first device (30) and a second clock signal (CLK) from the second device (50). The synchronizing unit (40) comprises a buffer (70) for buffering data and a write unit (80) for writing data from the first device (30) into the buffer (70), whereby a write access onto the buffer (70) is controlled by the first clock signal (DUT-CLK). A read unit (90) reads out data from the buffer (70) to be provided to the second device (50), whereby a read access onto the buffer (70) is controlled by the second clock signal (CLK). <IMAGE>
申请公布号 DE60100060(D1) 申请公布日期 2003.01.16
申请号 DE2001600060 申请日期 2001.03.31
申请人 AGILENT TECHNOLOGIES INC., A DELAWARE CORP. 发明人 BEHRENS, KLAUS-PETER;ROTTACKER, MARKUS;MOHR, JOERG-WALTER
分类号 G01R31/28;G01R31/319;G01R31/3193;H03L7/00;H04L7/02;(IPC1-7):H03L7/00 主分类号 G01R31/28
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