| 摘要 |
PURPOSE: A method for manufacturing a DRAM cell is provided to prevent short between bit lines and to define process margin by forming a bit line of a bar structure. CONSTITUTION: A transistor including a word line is formed on an active region of a semiconductor substrate. A plug(59) is formed on the active region by an anisotropic epitaxial process. An interlayer dielectric is formed on the entire surface including the plug. The interlayer dielectric is etched by using the plug as an etch stop layer. An insulating layer is formed on the entire surface including the plug. The plug is selectively exposed by using the mask for via contact and the plug is protruded by etching the insulating layer. A silicide layer is formed on the exposed surface of the plug and the volume of the plug is swelled. An interlayer dielectric having a bit line contact hole is formed on the entire surface including the silicide layer. A bit line(71) like a line is formed on the contact hole and a nearby interlayer dielectric.
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